This application claims the benefit of Korean Patent Application No. 2001-11822, filed on Mar. 7, 2001, the entirety of which is hereby incorporated by reference.
1. Field of the Invention
The present invention relates to an organic EL display, and more particularly, to a method of manufacturing a CMOS thin film transistor active matrix organic EL display.
2. Description of the Related Art
Recently, an organic EL display (OELD) receives attention as a flat panel display device because it has many advantages over other displays such as an LCD and a CRT. For example, the OELD is thin, lightweight and has low power consumption in comparison to the LCD and the CRT.
The OELDs are divided roughly into two types according to its driving method: active matrix (AM) type; and passive matrix (PM) type. Due to low current density and high luminous efficiency, the AM-OELD is studied by many groups.
A manufacturing process of the AM-OELD is very complicated. For example, in case of a coplanar CMOS TFT AM-OELD, eight mask processes, except the mask process for channel doping and Lightly Doped Drain (LDD) structure, are required to manufacture the CMOS TFT AM-OELD. Therefore, manufacturing yield is low, and production cost is high.
To overcome the problems described above, it is an object of the present invention to provide a method of manufacturing an organic EL display having high manufacturing yield and low production cost.
Additional objects and advantages of the invention will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of the invention.
In order to achieve the above and other objects, the present invention provides a method of manufacturing an organic EL display including a pixel region and a non-pixel region, the pixel region including a plurality of pixels, each pixel including at least two thin film transistors (TFTs), the non-pixel region including at least two TFTs having different conductive-types. The method includes a) depositing sequentially a transparent material layer and a first metal layer on a substrate; b) patterning simultaneously the transparent material layer and the first metal layer to form a pixel electrode, a first capacitor electrode, first and second source and drain electrodes on the pixel region, and first- and second-type source and drain electrodes on the non-pixel region; c) forming first and second semiconductor layers between the first and second source and drain electrodes, and first- and second-type semiconductor layers between the first- and second-type source and drain electrodes, respectively; d) forming an insulating layer having contact holes over the substrate; e) depositing a second metal layer over the whole surface of the substrate; f) patterning the second metal layer to form first and second gate electrodes and a first-type gate electrode, a second capacitor electrode, a first impurity shielding layer, the first impurity shielding layer formed over the second-type semiconductor layer; g) ion-implanting a first conductive type impurity to form first and second source and drain regions and first-type source and drain regions, respectively, on both end portions of the first and second semiconductor layer and the first-type semiconductor layer; h) depositing a second impurity shielding layer over the whole surface of the substrate; i) patterning the first impurity shielding layer and a portion of the second impurity shielding layer to form a second-type gate electrode; j) ion-implanting a second conductive type impurity to form second-type source and drain regions on both end portions of the second-type semiconductor layer; k) forming a planarization layer to expose a portion of the pixel electrode; and l) forming an EL light-emitting layer on the exposed portion of-the pixel electrode.
The first and second conductive type impurities are p- and n-type impurities, respectively, so that the TFTs on the non-pixel region are PMOS and NMOC TFTs. The first capacitor electrode is electrically connected to the first drain electrode and the second gate electrode, and the second capacitor electrode is electrically connected to the second source electrode. The method further includes forming a buffer layer between the substrate and the transparent material layer before the step (a). The buffer layer comprises SiO2. The pixel electrode is made of an indium tin oxide or indium zinc oxide. The planarization layer comprises acryl. The second impurity shielding layer is made of metal or photoresist.
Using the process of manufacturing the CMOS TFT AM-OELD according to the present invention, a manufacturing process is simplified, thereby leading to high manufacturing yield and low production cost.